Manual Fabricating Printed Circuit Boards (Demystifying Technology)

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Solder bumps are then formed on the UBM, as illustrated in Figure 4. Having the solder bumps on the smaller die facilitates the assembly process. Pre-processing required for flip-chip bonding not drawn to scale. Solder bumps, tens of microns thick, are fabricated on the UBM.

This section focuses on the design and fabrication of a specific prototype. Therefore, the challenging part with these dies was the circuit design, mainly the pixel layout, and not the fabrication. Photodetector dies, however, were fabricated in a custom process. In terms of manufacturability and performance, these dies are not the best that could be designed for the visible band — nm , which was targeted for simplicity.

However, they are the best that could be made with the available materials and equipment. A new process was developed at the UofA Nanofab to realize the photodetector dies. Process development requires that all materials used, e. The CMOS die was designed for a 0. The supply voltage V dd is 5 V. A floor plan of the design is shown in Figure 5 a. ADCs were not included for simplicity. Schematic and layout designs were done with Cadence. The schematic was verified using DC, AC, and transient simulations. Dies were fabricated through CMC. Layout of the active pixel is shown in Figure 5 b , and the principle schematics of each block is shown in Figure 6.

Each pixel has a bond pad BP for integration with a vertical photodetector and a lateral photodiode LP. It also includes a feedback logarithmic-response circuit FL , a standard logarithmic-response circuit SL , and a switch SW that configures the output. Although electrostatic discharge protection is recommended for all bond pads, such circuits were only included in wire bond pads.

Interior bond pads are inaccessible after flip-chip bonding. Because the light-sensitive semiconductor in the photodetector die is unpatterned, active pixels in the CMOS die employ feedback circuits to reduce crosstalk. A logarithmic response to light stimulus was chosen over a linear one because it can capture a higher dynamic range. The feedback logarithmic-response circuit maintains a constant voltage at the photodetector back contacts and, therefore, uses current as its input signal.

Readout of the FL and SL circuits is activated when the row - select signal is logic low. In this case, transistors P 3 and P 6 are conducting, and column bias currents, I col1 and I col2 , flow through the source-follower transistors, P 2 and P 5 , respectively. A lateral photodiode and a standard logarithmic-response circuit are included in each pixel so that the functionality of the CMOS die could be tested independently of flip-chip bonding and feedback.

The switch in each pixel is configured externally through the control line S. In one configuration, the lateral photodiode is connected to the input node of the standard logarithmic circuit, V in SL , and the vertical photodetector is connected to the input node of the feedback logarithmic circuit, V in FL. Connections are swapped in the second configuration. The switch acts as a multiplexer to analog signals; it is composed of transmission gates. In general, design rules of CMOS processes do not allow placement of devices underneath bond pads, and require bond pads to connect to all metal layers.

However, researchers are working to change this. For example, Ker et al. Their bond pads used all metal layers except the lowest, which was used for the transistors. Even after wire bonding, there was little difference between the characteristics of these transistors and standard ones, located far from the bond pads. The design of the photodetector die was mainly determined by the light-sensitive semiconductor that we could use. There was no equipment for GaAs deposition in the Nanofab.

Moreover, GaAs films must be deposited on GaAs substrates, which are opaque to visible light. Some options, such as HgCdTe, were ruled out because of their toxicity. Other options, such as organic films, did not have good enough performance at the time. After a careful review, the only semiconductor we could work with productively was a-Si:H. The latter method tends to yield higher quality films than the former method. Although the Nanofab has sputtering machines, none of them had a hydrogen supply.

Fortunately, Micralyne Inc. Therefore, our devices had to be based on intrinsic films, and so p-n or p-i-n photodiodes could not be implemented. Consequently, we designed an MSM device, in which an intrinsic a-Si:H layer is sandwiched between two conductive layers. Figure 7 illustrates the fabrication process of the photodetectors. The purpose of the first lithography step was to selectively etch the a-Si:H layer. The chamber was pumped down prior to the process.

Etching was done in an atmosphere composed of 40 sccm of carbon tetrafluoride CF 4 and 10 sccm of oxygen O 2. An RF power of W was applied, and the chamber pressure was 63 mTorr. A chrome mask was used for the dry etch because earlier trials with a photoresist mask showed that the etchant gases consumed the photoresist at a higher rate than the a-Si:H. Fabrication process of the designed photodetector die: a deposition of ITO and a-Si:H; b patterning of the a-Si:H; and c deposition and patterning of metal.

Chrome was used as the back contact because it has a good adhesion to non-metal substrates, including a-Si:H. To get a higher photocurrent to dark current ratio with this MSM device, the CMOS die connects the ITO electrode to a higher voltage than the chrome electrode due to the relative size of potential barriers at the two Schottky junctions [ 51 ].

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We used borosilicate glass Borofloat as the handle substrate for the photodetectors. Although thinner substrates were available, we used 1 mm thick ones because they were in stock at the Nanofab. Substrates were cleaned using a Piranha solution sulfuric acid and hydrogen peroxide. Results are presented in Figure 8.

Optical transmission of a borosilicate glass substrate before and after ITO deposition. Transmission of the coated glass was measured before and after the ITO was annealed.

Fabricating Printed Circuit Boards (Demystifying Technology)

Equipment and materials available in the Nanofab meant we could use either a thin metal or TCO film as the transparent electrode. The layer could be realized by physical vapour deposition PVD , i. Moreover, if a metal film is used, it must be less than 20 nm thick. Although the substrate is rotated during the deposition, there are still non-uniformities in film thickness.

With thin metals, small variations in thickness result in large variations in transparency and conductivity. When ITO is exposed to hydrogen plasma, hydrogen radicals react with the oxygen in the ITO, and reduce some of the oxide into metals, i. ZnO, on the contrary, is non-reactive under these conditions [ 54 ]. Although ZnO and AZO targets are available commercially, we were not allowed to work with zinc in the multi-user machines of the Nanofab because zinc has a high vapour pressure at low temperatures. Usage of zinc in the vacuum chambers would mean that, for a long time, future users of the machine would have zinc contamination in their depositions.

Therefore, we had to work with ITO. The deposition was done at room temperature in a pure argon environment with a gas flow of 50 sccm, and under pressure of 5. Each deposition lasted for 50 min. An RF power of 80 W was used during the process. Under these conditions, the mean deposition rate of the ITO was 5.

Film resistivity was measured immediately after deposition using a four-point probe.

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The average value was 5. The average resistivity after annealing was 5. As shown in Figure 8 , annealing had negligible impact on film transparency. ITO films show high optical transmission for wavelengths longer than nm, and this makes them suitable for photodetection in the visible and near IR bands. In the first set, a-Si:H was deposited on two thermal-oxide silicon wafers. One film was 50 nm thick, and the other was 1, nm thick. Film thicknesses were , , , and 1, nm. These depositions were used to fabricate the photodetector dies. The 1, nm film in this second set, however, was not uniform over the substrate.

We asked for multiple thicknesses to experimentally determine the optimal photodetector thickness. The thin Micralyne film on the thermal oxide substrate was used to measure optical properties in the visible band. A thin film is needed to ensure that not all the light passing through the a-Si:H is absorbed.

Results are compared to reported values for crystalline silicon [ 55 ], as well as hydrogenated and non-hydrogenated amorphous silicon [ 56 ]. In most of the visible band, the Micralyne film absorbs about ten times as much light as does crystalline silicon. Optoelectronic properties of Micralyne a-Si:H films: a measured absorption coefficient as compared to literature values; and b film conductivity and estimated pixel current for varying surface illuminance. The thick Micralyne film on the second thermal oxide substrate was used for optoelectronic characterization.

Because the thermal oxide substrate is an insulator, electrical properties of the film could only be tested with surface contacts. The transmission line model TLM method [ 57 ] was used to extract sheet resistance.

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This method requires long contacts with variable spacing to be patterned. Aluminum was deposited on the a-Si:H to form the contacts, and this was followed by a single lithography step. Aluminum interacts with a-Si:H to form ohmic contacts even at low temperatures [ 58 ]. Given film thickness, the material conductivity may also be extracted. Measurements with the patterned Micralyne film were repeated for several levels of surface illuminance.

The light source included a halogen light bulb with a 3, K correlated colour temperature and a cold fiber waveguide. Electrical measurements were performed using a probe station and a HP parameter analyzer. To estimate surface illuminance, luminance was measured with a meter from light reflected off white paper that was illuminated in identical conditions to the sample.

Results are shown in Figure 9 b. Conductivity of the Micralyne films changes by about four orders of magnitude in response to a similar change in surface illuminance. Currents in this range may be easily sensed by CMOS circuits. Figure 9 b proves that the Micralyne a-Si:H films are suitable for imaging in the visible band with the readout done using conventional CMOS circuits.

There is one more factor to note. Steabler and Wronski [ 60 ] found that, when exposed to light, there is a gradual decrease in the photocurrent and dark current of a-Si:H films. This change can be reversed by annealing the films in a temperature that is slightly lower than their deposition temperature. Extensive research has been done on the Steabler-Wronski effect SWE by various groups around the world see, for example, Stutzmann et al.

However, our main purpose is prototype fabrication and proof of functionality. Different light-sensitive devices may be used in future. Figure 3 shows finished CMOS and photodetector dies. Design and fabrication of these bond pads are discussed in a CMC application note [ 62 ]. The finished dies were sent to a flip-chip contractor, who deposited TSM on the interior bond pads of the CMOS dies, formed indium-based solder bumps on the UBM bond pads, and assembled several prototypes by flip-chip bonding.

The process developed there for the UBM includes deposition of a titanium adhesion layer and a thick aluminum layer. This is followed by electroless-nickel immersion-gold plating. It is also preferred that undiced glass substrates with photodetector arrays are sent rather than diced photodetector dies. Some dies were damaged as they were too small to handle. After formation of the solder bumps, the flip-chip contractor can dice the substrates into dies at his facility.

The FPGA is programmed to scan the array using the row and column address decoders.

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After a new address is placed, control signals are sent to the ADC to sample the analog output line of the image sensor. To capture scenes, the image sensor PCB is placed on the top of the FPGA board, and the two are accommodated in a camera body that was designed for this purpose. A photo of the disassembled camera is shown in Figure To demonstrate the effect of working with large pixels, the same scene was photographed with a commercial CCD camera an Olympus D with 3. The original photo taken with the CCD camera is shown in Figure 11 a.

Figure 11 b shows the image obtained after the original photo has been processed to match the resolution of the VI-CMOS prototype, i. A photo of the mug as taken with the prototype is shown in Figure 11 c. Example images: a taken with a commercial CCD camera; b same as previous but with the resolution changed to match that of the prototype; and c taken with the VI-CMOS prototype. Signal and noise properties of a digital camera define four important measures that affect the overall image quality: the signal-to-noise ratio SNR , the signal-to-noise-and-distortion ratio SNDR , the dynamic range DR , and the dark limit DL.

Noise sources exist in the imaging system and in the scene. They can be divided into two types: temporal noise and fixed-pattern-noise FPN. The SNR considers only the temporal noise, whereas the SNDR considers both temporal and fixed-pattern noise, which are assumed to be uncorrelated. At this operating point, the signal and noise power are equal. To characterize the signal and noise properties obtained with the VI-CMOS prototype, the camera was pointed at a uniformly illuminated scene.

A light bulb with colour temperature of 2, K was used as the light source. The image plane illuminance was varied by changing the aperture diameter or the f-stop number of the pupil. A neutral density filter Hoya ND with attenuation ratio of was used in combination with the pupil. For these measurements, the image sensor was configured to connect the vertical photodetectors to the input nodes of the standard logarithmic-response circuits, and data was read through the output lines of those circuits. Twenty frames sampled at a frame rate of 70 Hz were read and recorded at each luminance level.

The data was used for statistical calculations, i. The average response of each pixel is used as calibration data for a real-time FPN-correction algorithm. When enough time is given for adaptation, the DR of the human eye extends at least dB. Human vision has three regions of operation [ 64 ].

Scotopic vision, or dark vision, occurs for luminances lower than 0. For luminances between these thresholds, the human eye operates in a transition mode called mesopic vision. In this region, the response to colour gradually deteriorates as luminance decreases. Assuming parameters of a conventional lens, data provided for the image plane illuminance at which the SNDR of an image sensor is 0 dB can be used to estimate the DL of a digital camera built with that sensor. Janesick [ 66 ] and Hoefflinger [ 67 ], for example, reported values obtained experimentally with linear and logarithmic CMOS APS cameras respectively.

However, its peak SNDR is low. In electronic image sensors, conversion of analog signals generated by photodetectors into digital signals can be done at four different levels. At chip level, one or more ADCs are fabricated on the same chip as the sensor array. In general, the longer the path an analog signal needs to travel to reach an ADC, the greater the noise it accumulates. Image sensors include photodetectors and mixed-signal circuits, which involve devices with different requirements.

Vertical integration of these devices means each tier may be fabricated in a different process. This enables advanced circuits in each pixel without sacrificing spatial resolution. Advanced pixel-level circuitry is essential for improving the overall performance of image sensors. It is desirable to leave the light-sensitive semiconductor unpatterned in the photodetector die of a VI-CMOS image sensor. This results in a preference for feedback active pixels in the CMOS die, whereby potential differences between adjacent photodetector contacts are attenuated to reduce pixel crosstalk.

The design of photodetectors for VI-CMOS image sensors, especially those fabricated by flip-chip bonding, has many more degrees of freedom than the design of photodetectors for CMOS image sensors. Choices need to be made regarding materials used for the handle substrate, the transparent electrode, and the light-sensitive devices. One must also choose the light-sensitive device type, which may be a photoconductor, photodiode, or phototransistor.

With all this freedom, photodetectors may be optimized for various applications. In addition to general design and fabrication principles, supported by extensive references, this work presents a specific VI-CMOS image sensor prototype. To make the prototype, a CMOS die was designed for a commercial process, and a photodetector die was designed for a custom process. Finally, the two dies were assembled by a flip-chip contractor through CMC. The first is a feedback logarithmic-response circuit, and the second is a standard logarithmic-response circuit. Optoelectronic properties of the Micralyne a-Si:H films were reported.

The films proved excellent for visible-band imaging. An imaging system has been developed to test the prototype. Characterization results of the signal and noise properties at video rates show that the prototype has a lower dark limit and a higher dynamic range than a conventional CMOS APS. The SNDR, however, is low. The main drawback with the prototype is a low spatial resolution due to large pixels. Even if fine-pitch flip-chip bonding cannot be accessed by Canadian researchers in the near future, there are applications where large pixels are acceptable.

For example, in medical X-ray imaging, which is a lens-less imaging technique, pixel pitches are of several tens of microns. Optimization of the photodetectors for a lower dark limit means that patients would be exposed to a lower X-ray dosage. Another advantage of the presented approach is its robustness. As long as contact dimensions and electrical interfaces are preserved, the same CMOS die may be bonded to various sensor dies, which are not limited to photodetector dies.

National Center for Biotechnology Information , U. Journal List Sensors Basel v. Sensors Basel. Published online Apr Author information Article notes Copyright and License information Disclaimer. This article has been cited by other articles in PMC. Introduction Fabrication of integrated circuit IC devices in 3D structures, where active components are stacked vertically to form a microsystem, is a growing trend in IC design.

Open in a separate window. Figure 1. Figure 2. Figure 3. Photodetector Die The photodetector die in Figure 3 b was fabricated in a custom process. Handle Substrate The handle substrate of the photodetector die must be transparent for the electromagnetic band targeted by the application. Table 1. Transparent Electrode The first layer on the handle substrate must be a transparent conductor. Table 2. Table 3.

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Light-Sensitive Devices Electronic photodetectors are mainly constructed from a light-sensitive semiconductor, which must have high absorption coefficients for the targeted wavelengths. Flip-Chip Bonding CMOS dies and photodetector dies need to undergo a few more process steps before they can be flip-chip bonded. Figure 4. Figure 5. Figure 6. Photodetector Die The design of the photodetector die was mainly determined by the light-sensitive semiconductor that we could use.

Figure 7. Handle Substrate We used borosilicate glass Borofloat as the handle substrate for the photodetectors. Figure 8. Transparent Electrode Equipment and materials available in the Nanofab meant we could use either a thin metal or TCO film as the transparent electrode. Figure 9. Figure Conclusion Image sensors include photodetectors and mixed-signal circuits, which involve devices with different requirements. References 1. Dong X, Xie Y. Wong H. IEEE Trans.

Electron Dev. Bajaj J. IEEE J.

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Solid-State Circ. One of the key concepts in electronics is the printed circuit board or PCB. It's so fundamental that people often forget to explain what a PCB is. Over the next few pages, we'll discuss the composition of a printed circuit board, cover some terminology, a look at methods of assembly, and discuss briefly the design process behind creating a new PCB.

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  • You can view the translation here. Printed circuit board is the most common name but may also be called "printed wiring boards" or "printed wiring cards". Before the advent of the PCB circuits were constructed through a laborious process of point-to-point wiring. This led to frequent failures at wire junctions and short circuits when wire insulation began to age and crack. A significant advance was the development of wire wrapping , where a small gauge wire is literally wrapped around a post at each connection point, creating a gas-tight connection which is highly durable and easily changeable.

    As electronics moved from vacuum tubes and relays to silicon and integrated circuits, the size and cost of electronic components began to decrease. Electronics became more prevalent in consumer goods, and the pressure to reduce the size and manufacturing costs of electronic products drove manufacturers to look for better solutions.

    Thus was born the PCB. PCB is an acronym for printed circuit board. It is a board that has lines and pads that connect various points together. In the picture above, there are traces that electrically connect the various connectors and components to each other. A PCB allows signals and power to be routed between physical devices. Solder is the metal that makes the electrical connections between the surface of the PCB and the electronic components.

    Being metal, solder also serves as a strong mechanical adhesive. A PCB is sort of like a layer cake or lasagna- there are alternating layers of different materials which are laminated together with heat and adhesive such that the result is a single object. The base material, or substrate, is usually fiberglass. Historically, the most common designator for this fiberglass is "FR4".

    This solid core gives the PCB its rigidity and thickness. There are also flexible PCBs built on flexible high-temperature plastic Kapton or the equivalent. Cheaper PCBs and perf boards shown above will be made with other materials such as epoxies or phenolics which lack the durability of FR4 but are much less expensive. You will know you are working with this type of PCB when you solder to it - they have a very distictive bad smell. These types of substrates are also typically found in low-end consumer electronics. Phenolics have a low thermal decomposition temperature which causes them to delaminate, smoke and char when the soldering iron is held too long on the board.

    The next layer is a thin copper foil, which is laminated to the board with heat and adhesive. On common, double sided PCBs, copper is applied to both sides of the substrate. In lower cost electronic gadgets the PCB may have copper on only one side. When we refer to a double sided or 2-layer board we are referring to the number of copper layers 2 in our lasagna. This can be as few as 1 layer or as many as 16 layers or more. PCB with copper exposed, no solder mask or silkscreen. The copper thickness can vary and is specified by weight, in ounces per square foot. The vast majority of PCBs have 1 ounce of copper per square foot but some PCBs that handle very high power may use 2 or 3 ounce copper.

    Each ounce per square translates to about 35 micrometers or 1. The layer on top of the copper foil is called the soldermask layer. It is overlaid onto the copper layer to insulate the copper traces from accidental contact with other metal, solder, or conductive bits. This layer helps the user to solder to the correct places and prevent solder jumpers.

    In the example below, the green solder mask is applied to the majority of the PCB, covering up the small traces but leaving the silver rings and SMD pads exposed so they can be soldered to. Soldermask is most commonly green in color but nearly any color is possible. The white silkscreen layer is applied on top of the soldermask layer. The silkscreen adds letters, numbers, and symbols to the PCB that allow for easier assembly and indicators for humans to better understand the board. We often use silkscreen labels to indicate what the function of each pin or LED. Silkscreen is most commonly white but any ink color can be used.

    Black, gray, red, and even yellow silkscreen colors are widely available; it is, however, uncommon to see more than one color on a single board. Now that you've got an idea of what a PCB structure is, let's define some terms that you may hear when dealing with PCBs:. Not so accurate, but functional drill hits. Abe does a quick demonstration of how to line up a paste stencil and apply solder paste. It's pretty awesome.

    Various portions of the PCB that have no traces but has a ground pour instead. The legs of the resistor go through the holes. The popular pogo pin with pointed tip. We use tons of these on our test beds. Complex slots cut into the ProtoSnap - Pro Mini. There are also many mouse bites shown. Note: the corners of the slots cannot be made completely square because they are cut with a circular routing bit.